Hardware&Protocols
- Pentesting hardware - a pratical handbook
- hardware-effects: repo with demonstration of various hardware effects.
- Beginners guide to car hacking
CPU
Wait state
Bus
Wishbone
It's intended to let ports of an IC communicate with each other and as "logic bus" so it specifies only signals, clock cycles and high/low levels.
- Wishbone B4 specification
- wb_gpio - A Wishbone GPIO Engine for FPGAs
- Some example from ZipCPU
- An Overview of a Wishbone-UART Bridge
- Building a simple wishbone slave